Publications

Please find below the publications related to FVM, and the specific bibtex entries to cite them in papers or reports.

If you are using the FVM in an academic context, please cite the methodology [J1].

Journal articles

The main paper describing the methodology:

[J1]

Hipólito Guzmán-Miranda, Marcos López García, and Alberto Urbón Aguado. FVM: A Formal Verification Methodology for VHDL designs. IEEE Open Journal of the Computer Society, 2025. Early Access. URL: https://ieeexplore.ieee.org/document/11217165.

@article{FVM_methodology,
    author    = {Hipólito {Guzmán-Miranda} and Marcos {López García} and Alberto {Urbón Aguado}},
    title     = {{FVM}: {A} {F}ormal {V}erification {M}ethodology for {VHDL} designs},
    journal   = {IEEE Open Journal of the Computer Society},
    note      = {Early Access},
    year      = {2025},
    url       = {https://ieeexplore.ieee.org/document/11217165}
}

Conference proceedings

Preliminary work towards the FVM was presented at SEFUW2025:

[C1]

Hipólito Guzmán-Miranda, Marcos López García, and Alberto Urbón Aguado. Towards a formal verification methodology for digital electronics in the space sector. In Space FPGA Users Workshop (SEFUW). March 2025. URL: https://indico.esa.int/event/531/contributions/10608/.

@inproceedings{towards_FVM,
    author    = {Hipólito {Guzmán-Miranda} and Marcos {López García} and Alberto {Urbón Aguado}},
    title     = {Towards a Formal Verification Methodology for Digital Electronics in the space sector},
    booktitle = {Space FPGA Users Workshop (SEFUW)},
    year      = {2025},
    month     = {March},
    location  = {Noordwijk, The Netherlands},
    url       = {https://indico.esa.int/event/531/contributions/10608/}
}